Intel 80C186EA User Manual page 150

Hide thumbs Also See for 80C186EA:

Table of Contents

At the second falling CLKOUT edge after sampling RESIN inactive, the processor deasserts RE-

SOUT. Bus activity starts 6½ CLKOUT periods after recognition of RESIN in the logic high

state. If an alternate bus master asserts HOLD during reset, the processor immediately asserts

HLDA and will not prefetch instructions.

CLOCK GENERATION AND POWER MANAGEMENT

Figure 5-7. Warm Reset Waveform

Minimum RESIN

low time 4 CLKOUT