Intel 80C186EA User Manual page 187

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CHIP-SELECT UNIT
$
TITLE
$
MOD186XREF
NAME
; External reference from this module
$
include(PCBMAP.INC
; Module equates
; Configuration equates
INTRDY EQU
EXTRDY EQU
IO
ALLPCS EQU
;Below is a list of the default system memory and I/O environment. These
;defaults configure the Chip-Select Unit for proper system operation.
;EPROM memory is located from 0E0000 to 0FFFFF (128 Kbytes).
;Wait states are calculated assuming 16MHz operation.
;UCS# controls the accesses to EPROM memory space.
EPROM_SIZE EQU 128
EPROM_BASE EQU 1024 - EPROM_SIZE;Start address in Kbytes
EPROM_WAIT EQU 1
;The UMCS register values are calculated using the above system contraints
;and the equations below.
UMCS_VAL EQU
&
;SRAM memory starts at 0H and continues to 7FFFH (32 Kbytes).
;Wait states are calculated assuming 16MHz operation.
;LCS# controls the accesses to SRAM memory space.
SRAM_SIZE EQU
SRAM_BASE EQU
SRAM_WAIT EQU
SRAM_RDY
;The LMCS register value is calculated using the above system constraints
;and the equations below
LMCS_VAL
&
;A DRAM interface is selected by the MCS3:0 chip-selects. The BASE value
;defines the starting address of the DRAM window. The SIZE value (along with
;the BASE ;value) defines the ending address. Zero wait state performance
;is assumed. The Refresh Control Unit uses DRAM_BASE to properly configure
;refresh operation.
6-20
(Chip-Select Unit Initialization)
CSU_EXAMPLE_1
0004H
0000H
EQU
0080H
0040H
(EPROM_BASE SHL 6)OR (0C038H) OR
(EPROM_RDY)
32
0
0
EQU
INTRDY
EQU
((SRAM_SIZE - 1)SHL6) OR (0038H) OR
(SRAM_RDY)
Example 6-1. Initializing the Chip-Select Unit
;File declares register
;locations and names.
;Internal bus ready modifier
;External bus ready modifier
;PCS Memory/IO select modifier
;PCS/Latched address modifier
;Size in Kbytes
;Wait states
OR (EPROM_WAIT)
;Size in Kbytes
;Start address in Kbytes
;Wait states
;Ignore bus ready
OR (SRAM_WAIT)

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