Intel 80C186EA User Manual page 100

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CLKOUT
ARDY
In a Normally-Ready system, a wait state will be inserted when 1 & 2 are met.
(Assumes SRDY is low.)
1.
T
CLIS
2.
T
CLIH
CLKOUT
ARDY
SRDY
Alternatively, in a Normally-Ready system, a wait state will be inserted
when1 & 2 are met for SRDY and ARDY.
1.
T
CHIS
2.
T
CHIH
Failure to meet READY setup and hold can cause a device failure
!
(i.e., the bus hangs or operates inappropriately).
Conditions causing the BIU to become idle include the following.
The instruction prefetch queue is full.
An effective address calculation is in progress.
The bus cycle inherently requires idle states (e.g., interrupt acknowledge, locked opera-
tions).
Instruction execution forces idle states (e.g., HLT, WAIT).
T2
2
1
: ARDY low to clock high
: Clock high to ARDY high (ARDY inactive hold time)
T2
1
: ARDY and SRDY low to clock low
: ARDY and SRDY low from clock low
Figure 3-18. Normally Ready System Timings
BUS INTERFACE UNIT
T3
TW
T3
TW
2
T4
T4
A1045-0A
3-19

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