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Register Name:
Register Mnemonic:
Register Function:
15
Bit
Mnemonic
INT3:0
External
Interrupt In-
Service
DMA1:0
DMA
Interrupt In-
Service
TMR
Timer
Interrupt In-
Service
NOTE: Reserved register bits are shown with gray shading. Reserved bits must be written
to a logic zero to ensure compatibility with future Intel products.
8.4.6
Poll and Poll Status Registers
The Poll and Poll Status registers allow you to poll the Interrupt Control Unit and service inter-
rupts through software. You can read these registers to determine whether an interrupt is pending
and, if so, the interrupt type. The registers contain identical information, but reading them pro-
duces different results.
In-Service Register
INSERV
Indicates which interrupt handlers are in process
Reset
Bit Name
State
0000 0
0
0
Figure 8-10. In-Service Register
INTERRUPT CONTROL UNIT
I
I
I
I
N
N
N
N
T
T
T
T
3
2
1
0
Function
A bit is set to indicate that the corresponding
external interrupt is being serviced.
This bit is set to indicate that the corresponding
DMA channel interrupt is being serviced.
This bit is set to indicate that a timer interrupt is
being serviced.
0
D
D
T
M
M
M
A
A
R
1
0
A1192-A0
8-19
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