Redundant Host; One Extended Compactpci* Bus Configuration - Intel NetStructure ZT 5085 12U Manual

Introduction
Figure 6. One Extended CompactPCI* Bus Configuration
1A
1B
1.4.3

Redundant Host

The ZT 5085 can serve as a PICMG* 2.16 compliant High Availability platform for two
Redundant Host processor boards. Intel's Redundant Host architecture incorporates a second
system master board, a Redundant Host, which can take over bus ownership in the event of a
primary system master board failure. This allows the failed board to be replaced without
interruption of service. Resource management and data base information is synchronized between
the processor boards via 100 Mbps Ethernet.
For more information about Intel's High Availability architecture and development of Redundant
Host drivers, refer to the High Availability Software for the Intel
Technical Product Specification.
16
2 3 4 5 6 7 8
CompactPCI
Bus
Host Processor Board
9 12 13 14 15
CompactPCI CompactPCI
Bus Bus
Bridge Mezzanine Board
®
16 17 18 19 20 21
NetStructure™ ZT 4901
Technical Product Specification