Hdlc Transmit Buffer Descriptor (Tx Bd); Figure 4-28. Hdlc Transmit Buffer Descriptor - Motorola MC68302 User Manual

Integrated multiprotocol processor
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Communications Processor (CP)
CR—Rx CRC Error
This frame contains a CRC error.
OV—Overrun
A receiver overrun occurred during frame reception.
CD—Carrier Detect Lost
The carrier detect signal was negated during frame reception. This bit is valid only when
working in NMSI mode.
Data Length
The data length is the number of octets written to this BD's data buffer by the HDLC con-
troller. It is written by the CP once as the BD is closed.
When this BD is the last BD in the frame (L = 1), the data length contains the total number
of frame octets (including any previous linked receive data buffers and two or four bytes
for the CRC) in the frame. This behavior is useful for determining the total number of oc-
tets received, even if MFLR was exceeded.
The actual amount of memory allocated for this buffer should be
even and greater than or equal to the contents of maximum re-
ceive buffer length register (MRBLR).
Rx Buffer Pointer
The receive buffer pointer, which always points to the first location of the associated data
buffer, may reside in either internal or external memory.
The Rx buffer pointer must be even, and the upper 8 bits must
of the pointer must be zero for the function codes to operate cor-
rectly.

4.5.12.11 HDLC Transmit Buffer Descriptor (Tx BD)

Data is presented to the HDLC controller for transmission on an SCC channel by arranging
it in buffers referenced by the channel's Tx BD table. The HDLC controller confirms trans-
mission (or indicates error conditions) using the BDs to inform the M68000 core that the buff-
ers have been serviced. The Tx BD is shown in Figure 4-28.
15
14
OFFSET + 0
R
X
OFFSET + 2
OFFSET + 4
OFFSET + 6
4-78
13
12
11
10
W
I
L
TC
DATA LENGTHTX BUFFER POINTER (24-bits used, upper 8 bits must be 0)

Figure 4-28. HDLC Transmit Buffer Descriptor

MC68302 USER'S MANUAL
NOTE
NOTE
9
8
7
6
5
4
3
2
UN
MOTOROLA
1
0
CT

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