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CP µCODE
ADDRESS
INTERNAL
PERIPHERAL
ADDRESS
BUS
M68000
SYSTEM
ADDRESS
BUS
3.5 TIMERS
The MC68302 includes three timer units: two identical general-purpose timers and a soft-
ware watchdog timer.
Each general-purpose timer consists of a timer mode register (TMR), a timer capture regis-
ter (TCR), a timer counter (TCN), a timer reference register (TRR), and a timer event register
(TER). The TMR contains the prescaler value programmed by the user. The software watch-
dog timer, which has a watchdog reference register (WRR) and a watchdog counter (WCN),
uses a fixed prescaler value. The timer block diagram is shown in Figure 3-8.
MOTOROLA
SYSTEM RAM
576 BYTES
(DATA RAM
OR
µCODE RAM)
PARAMETER RAM
576 BYTES
Figure 3-7. RAM Block Diagram
MC68302 USER'S MANUAL
System Integration Block (SIB)
CP µCODE DATA
PERIPHERAL
DATA BUS
M68000
DATA BUS
3-35
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