Adaption For Asynchronous Rates Up To 19.2 Kbps; Controller Overview; V.110 Controller Overview; Figure 4-39. Three-Step Asynchronous Bit Rate Adaption - Motorola MC68302 User Manual

4.5.15.3 Adaption for Asynchronous Rates up to 19.2 kbps

The V.110 asynchronous bit rate adaption block diagram within the terminal adaptor is
shown in Figure 4-39.
R
MANIPULATION
V-SERIES

Figure 4-39. Three-Step Asynchronous Bit Rate Adaption

This function may be implemented in two SCCs. One SCC operates as a UART; the other
SCC operates as a V.110 controller. The M68000 core formats the data for transmission by
the V.110 at the 64 kbps data rate. Thus, the RA1 step is hidden in software.

4.5.15.4 V.110 Controller Overview.

By the appropriate setting of its SCC mode register, any of the SCC channels may be con-
figured to function as a V.110 controller. MODE1–MODE0 bits the SCC mode register
should be programmed to DDCMP, and the V.110 bit in the DDCMP mode register should
be set. The V.110 controller has the ability to receive and transmit V.110 80-bit frames. The
processing of those frames is handled by the M68000 core in software.
The V.110 receiver will synchronize on the 17-bit alignment pattern of the frame:
00000000
1xxxxxxx
After achieving frame synchronization, the receiver will transfer the frame data to a receive
buffer (the leading one will be the MSB so that the programmer does not have to swap the
bits). The V.110 controller will write nine bytes of data to the buffer (discarding the first byte
of all zeros). The M68000 core should unformat the data in memory according to the V.110
protocol to create the data buffer; it may then use another SCC controller to transmit this
data to the R interface.
The V.110 transmitter will transmit a data buffer transparently with a bit swap (the MSB will
be transmitted first) onto a B channel. The data buffer should contain the 17-bit alignment
pattern. Another SCC controller may be used to receive data from the R interface. The
M68000 core should then format the data according to the V.110 protocol to create the
V.110 80-bit frame data buffer. The V.110 controller will then transmit it onto the B channel.
MOTOROLA
RA0
(2**n)*600
STOP-BIT
STEP 1
1xxxxxxx 1xxxxxxx
1xxxxxxx 1xxxxxxx
MC68302 USER'S MANUAL
Communications Processor (CP)
RA1
(2**k)*8
bps
(2**k)*8
kbps
STEP 2
1xxxxxxx 1xxxxxxx
1xxxxxxx 1xxxxxxx
RA2 S/T
kbps
64
kbps
STEP 3
4-117