8.14 AC ELECTRICAL CHARACTERISTICS—INTERRUPT RESET
TIMING
(See Figure 8-14 and Note)
OP3 High (When Used as Counter Interrupt) from LDS Negated
After Stop Counter Command
NOTE: Test conditions for interrupt output: C L = 50 pF, R L = 2 k to V CC .
LDS
OP3
*
When used as counter interrupt output.
8.15 AC ELECTRICAL CHARACTERISTICS—TRANSMITTER TIMING
(See Figure 8-15 and Note)
TxD Output Valid from TxC Low
CTS Input Setup to Tx Clock High *
CTS Input Hold from Tx Clock High *
RTS Output Valid from Tx Clock
* CTS is an asynchronous input. This specification is only provided to guarantee CTS recognition on a particular Tx clock
edge.
Tx CLOCK SOURCE
(X1 OR IP2)
OP0, OP1
WHEN USED
AS TxRTS
WHEN USED
MOTOROLA
Characteristic
*
Figure 8-14. Interrupt Reset Timing
Characteristic
t
TxD
TxD
IP0, IP1
AS CTS
Figure 8-15. Transmit Timing
MC68306 USER'S MANUAL
1 BIT TIME
t
t CH
t CS
Symbol
Min
Max
t IR
—
100
t
IR
Symbol
Min
Max
t TxD
—
100
t CS
30
—
t CH
30
—
t TRD
—
100
t
TxD
TRD
Unit
ns
Unit
ns
ns
ns
ns
8- 17