Buffer Descriptors Table; Figure 4-15. Memory Structure - Motorola MC68302 User Manual

Integrated multiprotocol processor
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Communications Processor (CP)

4.5.5 Buffer Descriptors Table

Data associated with each SCC channel is stored in buffers. Each buffer is referenced by a
buffer descriptor (BD). BDs are located in each channel's BD table (located in dual-port
RAM). There are two such tables for each SCC channel: one is used for data received from
the serial line; the other is used to transmit data. The actual buffers may reside in either ex-
ternal memory or internal memory (dual-port RAM). For internal memory data buffers, the
data buffer pointer is in the low-order data pointer word and is an offset from the device base
address to any available area in the dual-port RAM. (Data buffers may reside in the param-
eter RAM of an SCC if it is not enabled).
The BD table allows the user to define up to eight buffers for the transmit channel and up to
eight buffers for the receive channel (Figure 4-15). Each BD table forms a circular queue.
The format of the BDs is the same for each SCC mode of operation (HDLC, UART, DDCMP,
BISYNC, V.110, and transparent) and for both transmit or receive. Only the first field (con-
taining status and control bits) differs for each protocol. The BD format is shown in Figure 4-
16.
DUAL-PORT RAM (1152 BYTES)
TX DATA BUFFER
SCC1 BUFFER
DESCRIPTORS
TABLE
SCC2 BUFFER
DESCRIPTORS
TABLE
SCC3 BUFFER
DESCRIPTORS
TABLE
SCP DESCRIPTOR
SMC1 DESCRIPTOR
SMC2 DESCRIPTOR
4-32
TX BUFFER DESCRIPTORS (8)
FRAME STATUS
DATA LENGTH
DATA POINTER
RX BUFFER DESCRIPTORS (8)
FRAME STATUS
DATA COUNT
DATA POINTER
D
E
R

Figure 4-15. Memory Structure

MC68302 USER'S MANUAL
EXTERNAL MEMORY
DATA
TX DATA
RX DATA
TX DATA BUFFER
RX DATA BUFFER
MOTOROLA

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