Uart Receive Buffer Descriptor (Rx Bd) - Motorola MC68302 User Manual

ceives the address character and writes it to a new buffer. No address recognition
is performed.
10 = The DDCMP protocol is implemented over the asynchronous channel.
11 = Multidrop mode is enabled as in the 01 case, and the IMP automatically checks
the address of the incoming address character and either accepts or discards the
data following the address.
FRZ—Freeze Transmission
This bit allows the user to halt the UART transmitter and to continue transmission from the
next character in the buffer at a later time.
0 = Normal operation (or resume transmission after FRZ is set).
1 = The UART completes transmission of any data already transferred to the UART
FIFO (up to three characters) and then stops transmitting data. The UART contin-
ues to receive normally.
CL—Character Length
0 = 7-bit character length. On receive, bit 7 in memory is written as zero. On transmit,
bit 7 in memory is a don't care.
1 = 8-bit character length
RTSM—RTS Mode
0 = RTS is asserted whenever the transmitter is enabled and there are characters to
transmit. RTS is negated after the last stop bit of a transmitted character when both
the shift register and the transmit FIFO are empty. RTS is also negated at the end
of a buffer to guarantee accurate reporting of the CTS bit in the BD.
1 = RTS is asserted whenever the transmitter is enabled (the ENT bit is set).
SL—Stop Length
This bit selects the number of the stop bits transmitted by the UART. The receiver is al-
ways enabled for one stop bit. Fractional stop bits are configured in the DSR (see
4.5.11.12 Fractional Stop Bits).
0 = One stop bit
1 = Two stop bits
COMMON SCC MODE BITS—see 4.5.3 SCC Mode Register (SCM) for a description of the
DIAG1, DIAG0, ENR, ENT, MODE1, and MODE0 bits.

4.5.11.14 UART Receive Buffer Descriptor (Rx BD)

The CP reports information about each buffer of received data by its BDs. The Rx BD is
shown in Figure 4-20. The CP closes the current buffer, generates a maskable interrupt, and
starts to receive data in the next buffer due to any of the following events:
1. Reception of a user-defined control character (when reject (R) bit = 0)
2. Detection of an error during message processing
3. Detection of a full receive buffer
4. Reception of a programmable number of consecutive IDLE characters
MOTOROLA MC68302 USER'S MANUAL
Communications Processor (CP)
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