E.2.1.1.2 Serial Lnterface Mode Register (Slmode) - Motorola MC68302 User Manual

Integrated multiprotocol processor
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SCC Programming Reference

E.2.1.1.2 Serial lnterface Mode Register (SlMODE).

15
14
SETZ
SYNC/SCIT
7
6
B1RB
B1RA
SETZ—Set L1TXD to Zero (valid only for the GCI interface)
0 = Normal operation.
1 = L1TXD output set to a logic zero (used in GCI activation).
SYNC/SCIT—SYNC Mode/SClT Select Support
0 = One pulse wide prior to the 8-bit data.
1 = N pulses wide and envelopes the N-bit data.
SDIAG1, SDIAG0—Serial Interface Diagnostic Mode
00 = Normal operation.
01 = Automatic echo.
10 = Internal loopback.
11 = Loopback control.
SDC2—Serial Data Strobe Control 2
0 = SDS2 signal is asserted during the B2 channel.
1 = SDS1 signal is asserted during the B2 channel.
SDC1—Serial Data Strobe Control 1
0 = SDS1 signal is asserted during the B1 channel.
1 = SDS2 signal is asserted during the B1 channel.
B2RB, B2RA—B2 Channel Route in IDL/GCI Mode or CH-3 Route in PCM Mode
00 = Channel not supported.
01 = Route channel to SCC1.
10 = Route channel to SCC2 (if MSC2 is cleared).
11 = Route channel to SCC3 (if MSC3 is cleared).
B1 RB, B1 RA—B1 Channel Route in IDL/GCI Mode or CH-2 Route in PCM Mode
00 = Channel not supported.
01 = Route channel to SCC1.
10 = Route channel to SCC2 (if MSC2 is cleared).
11 = Route channel to SCC3 (if MSC3 is cleared).
E-18
13
12
SDIAG1
SDIAG0
5
4
DRB
DRA
MC68360 USER'S MANUAL
11
10
SDC2
SDC1
3
2
MSC3
MSC2
9
8
B2RB
B2RA
1
0
MS1
MS0
MOTOROLA

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