Table 2-2. M68000 Instruction Set Summary - Motorola MC68302 User Manual

Integrated multiprotocol processor
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Mnemonic
ABCD
Add Decimal with Extend
ADD
Add
AND
Logical AND
ASL
Arithmetic Shift Left
ASR
Arithmetic Shift Right
Bcc
Branch Conditionally
BCHG
Bit Test and Change
BCLR
Bit Test and Clear
BRA
Branch Always
BSET
Bit Test and Set
BSR
Branch to Subroutine
BTST
Bit Test
CHK
Check Register Against Bounds
CLR
Clear Operand
CMP
Compare
DBcc
Decrement and Branch Conditionally
DIVS
Signed Divide
DIVU
Unsigned Divide
EOR
Exclusive OR
EXG
Exchange Registers
EXT
Sign Extend
JMP
Jump
JSR
Jump to Subroutine
LEA
Load Effective Address
LINK
Link Stack
LSL
Logical Shift Left
LSR
Logical Shift Right
MOTOROLA

Table 2-2. M68000 Instruction Set Summary

Description
MC68302 USER'S MANUAL
MC68000/MC68008 Core
Mnemonic
MOVE
Move Source to Destination
MULS
Signed Multiply
MULU
Unsigned Multiply
NBCD
Negate Decimal with Extend
NEG
Negate
NOP
No Operation
NOT
Ones Complement
OR
Logical OR
PEA
Push Effective Address
RESET
Reset External Devices
ROL
Rotate Left without Extend
ROR
Rotate Right without Extend
ROXL
Rotate Left with Extend
ROXR
Rotate Right with Extend
RTE
Return from Exception
RTR
Return and Restore
RTS
Return from Subroutine
SBCD
Subtract Decimal with Extend
Scc
Set Conditionally
STOP
Stop
SUB
Subtract
SWAP
Swap Data Register Halves
TAS
Test and Set Operand
TRAP
Trap
TRAPV
Trap on Overflow
TST
Test
UNLK
Unlink
Description
2-5

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