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SDC2—Serial Data Strobe Control 2
0 = SDS2 signal is asserted during the B2 channel.
1 = SDS1 signal is asserted during the B2 channel.
SDC1—Serial Data Strobe Control 1
0 = SDS1 signal is asserted during the B1 channel.
1 = SDS2 signal is asserted during the B1 channel.
B2RB, B2RA—B2 Channel Route in IDL/GCI Mode or CH-3 Route in PCM Mode
00 = Channel not supported.
01 = Route channel to SCC1.
10 = Route channel to SCC2 (a MSC2 is cleared).
11 = Route channel to SCC3 (if MSC3 is cleared).
B1 RB, B1 RA—B1 Channel Route in IDL/GCI Mode or CH-2 Route in PCM Mode
00 = Channel not supported.
01 = Route channel to SCC1.
10 = Route channel to SCC2 (a MSC2 is cleared).
11 = Route channel to SCC3 (if MSC3 is cleared).
DRB, DRA—D Channel Route in IDL/GCI Mode or CH-1 Route in PCM Mode
00 = Channel not supported.
01 = Route channel to SCC1.
10 = Route channel to SCC2 (a MSC2 is cleared).
11 = Route channel to SCC3 (if MSC3 is cleared).
MSC3—SCC3 Connection
0 = SCC3 is connected to the multiplexed serial interface.
1 = SCC3 is not connected to the multiplexed serial interface.
MSC2—SCC2 Connection
0 = SCC2 is connected to the multiplexed serial interface.
1 = SCC2 is not connected to the multiplexed serial interface.
MS1, MS0—Mode Supported
00 = NMSI mode.
01 = PCM mode.
10 = IDL mode.
11 = GCI interface.
E.1.1.1.3 Serial Interface Mask Register (SIMASK). This 16-bit register is located at off-
set $8B2. The SIMASK register is used to configure which bits on the B1 and B2 channels
are used in the GCI and IDL modes. Bit 0 of SIMASK is the first bit transmitted and received
on B1.
15
MOTOROLA
B2
MC68360 USER'S MANUAL
8
7
SCC Programming Reference
B1
0
E-5
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