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1. Write the port A and port B control registers (PACNT and PBCNT) to configure SCC2
or SCC3 serial interface pins as peripheral pins, if SCC2 or SCC3 is used.
2. Write SIMODE to configure the SCCs physical interface.
3. Write SIMASK if IDL or GCI multiplexed mode was selected in SIMODE.
E.3.2.2 GENERAL AND TRANSPARENT PROTOCOL-SPECIFIC RAM INITIALIZATION.
4. Write RFCR/TFCR.
5. Write MRBLR.
E.3.2.3 SCC INITIALIZATION.
6. Write SCON.
7. Write SCM without setting the ENR and ENT bits.
8. Write DSR.
9. Write SCCE with $FF to clear any previous events.
10. Write SCCM.
11. Write IMR.
E.3.2.4 SCC OPERATION.
12. Write the Rx buffer descriptor control/status, buffer pointer high, and buffer pointer low
words for all of the buffer descriptors that are going to be used. Set the W bit in the last
buffer descriptor to be used in the queue.
13. Prepare transmit buffers as required to transmit data on the SCC. Set the R bit in each
Tx buffer descriptor's control/status word when the data buffer is ready for transmis-
sion. Set the W bit in the last Tx buffer descriptor in the table so that the IMP will use
the first Tx buffer descriptor (after the user sets the R bit) for the next transmission.
14. Write SCM, setting the ENR and ENT bits to enable reception and transmission on the
SCC.
15. Prepare more transmit buffers as required to transmit data on the SCC.
E.3.2.5 SCC INTERRUPT HANDLING.
1. Read the SCC event register.
2. Clear any unmasked bits that will be used in this interrupt routine.
3. Handle the interrupt events as required by the system.
4. Clear the appropriate SCC bit in the in-service register (ISR) of the interrupt controller.
5. Return from the interrupt.
MOTOROLA
MC68360 USER'S MANUAL
SCC Programming Reference
E-41
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