Table 3-6 Ipcmxmode Register Bit Assignments; Figure 3-4 Ipcmxmode Register Bit Assignments - ARM PrimeCelL PL320 Technical Reference Manual

Programmer's Model
3.3.6 Mailbox Mask Set Registers
3-14
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The Auto Acknowledge bit provides an acknowledge interrupt back to the source core
when the Mailbox Destination Register has been cleared. The Auto Acknowledge
indicates when all cores that have received a message have cleared their interrupts. The
Auto Acknowledge bit must always be set when there is more than one destination core.
The Auto Link bit links adjacent mailboxes together to enable multiple messages to be
sent sequentially by the source core without the requirement for the source core to be
interrupted between messages. Instead of an acknowledge interrupt being sent back to
the source core, which can be done manually by a single destination core or
automatically using Auto Acknowledge, the linked mailbox message is sent. The order
of linking is fixed. Mailbox0 links to Mailbox1, which can link to Mailbox2, up to
Mailbox31.
The IPCMxMODE Registers are cleared when the Mailbox Source Register is cleared.
Figure 3-4 shows the register bit assignments.
31
Table 3-6 lists the register bit assignments.
Bit
[31:2]
[1]
[0]
The write-only IPCMxMSET Registers set bits in the Mailbox Mask Registers. They
can only be written to after the Mailbox Source Register is defined.
Copyright © 2003, 2004. ARM Limited. All rights reserved.
Undefined

Figure 3-4 IPCMxMODE Register bit assignments

Table 3-6 IPCMxMODE Register bit assignments

Name Function
- Read undefined. Write as zero.
Auto Link Set to enable Auto Link.
Auto Acknowledge Set to enable Auto Acknowledge.
2 1 0
Auto Link
Auto Acknowledge
ARM DDI 0306B