ARM PrimeCelL PL320 Technical Reference Manual page 7

List of Figures
PrimeCell Inter-Processor Communications
Module (PL320) Technical Reference Manual
Figure 2-1
Figure 2-2
Figure 2-3
Figure 2-4
Figure 2-5
Figure 2-6
Figure 2-7
Figure 2-8
Figure 2-9
Figure 2-10
Figure 2-11
Figure 2-12
Figure 3-1
Figure 3-2
Figure 3-3
Figure 3-4
Figure 3-5
Figure 3-6
ARM DDI 0306B
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Key to timing diagram conventions ............................................................................. xii
IPCM block diagram .................................................................................................. 2-2
IPCM integration in a multiprocessing system .......................................................... 2-3
Basic operation ......................................................................................................... 2-5
Mailbox interrupt mapping to IPCM interrupt outputs .............................................. 2-11
Configuration, messaging from Core0 to Core1 ...................................................... 2-18
Messaging from Core0 to Core1 ............................................................................. 2-19
Configuration, back-to-back messaging from Core0 to Core1 ................................ 2-20
Back-to-back messaging from Core0 to Core1 ....................................................... 2-21
Configuration, messaging from Core0 to Cores 1, 2, and 3 using Auto Acknowledge ....
2-22
Messaging from Core0 to Cores 1, 2, and 3 using Auto Acknowledge ................... 2-23
Configuration, Auto Link messaging from Core0 to Core1 using Mailbox0 and Mailbox1
2-25
Auto Link messaging from Core0 to Core1 using Mailbox0 and Mailbox1 .............. 2-25
IPCM register map .................................................................................................... 3-4
Mailbox0 register map ............................................................................................... 3-5
Interrupt0 register map .............................................................................................. 3-5
IPCMxMODE Register bit assignments .................................................................. 3-14
IPCMxSEND Register bit assignments ................................................................... 3-16
Mailbox status ......................................................................................................... 3-18
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