ARM PrimeCelL PL320 Technical Reference Manual page 79

Glossary
Advanced eXtensible Interface (AXI)
Advanced High-performance Bus (AHB)
ARM DDI 0306B
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This glossary describes some of the terms used in ARM manuals. Where terms can have
several meanings, the meaning presented here is intended.
This is a bus protocol that supports separate address/control and data phases, unaligned
data transfers using byte strobes, burst-based transactions with only start address issued,
separate read and write data channels to enable low-cost DMA, ability to issue multiple
outstanding addresses, out-of-order transaction completion, and easy addition of
register stages to provide timing closure.The AXI protocol also includes optional
extensions to cover signaling for low-power operation.
AXI is targeted at high performance, high clock frequency system designs and includes
a number of features that make it very suitable for high speed sub-micron interconnect.
The AMBA Advanced High-performance Bus system connects embedded processors
such as an ARM core to high-performance peripherals, DMA controllers, on-chip
memory, and interfaces. It is a high-speed, high-bandwidth bus that supports
multi-master bus management to maximize system performance.
See also Advanced Microcontroller Bus Architecture.
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