ADTRAN Atlas 550 System Manual page 153

ATLAS 550 System Manual
M (FXO-4/8) > S
ODULES
Read security: 5
Displays the status of each of the FXO ports.
M (FXO-4/8) > S
ODULES
Read security: 5
Indicates the port number. There are 4 available interfaces on the Quad FXO Option Module and 8 on the
Octal FXO Option Module.
M (FXO-4/8) > S
ODULES
Read security: 5
Displays the call status of each voice port. This field may display the following:
I
DLE
R G
ING ROUND
O H
FF OOK
R B
EVERSE ATTERY
R
INGING
T -O
IP PEN
U
NKNOWN
I
NACTIVE
A
VAILABLE
N A
OT VAILABLE
D
ISABLED
T
EST
LO
LC-T/R OK
LC-N B
O ATTERY
LC-T/R R
OLLED
R GND
ING
M (FXO-4/8) > S
ODULES
Read security: 5
Receive Signaling bits have local significance only, and represent signaling between the ATLAS 550
Controller and the voice port if the port is configured in the
.
RBS
61200305L2-1B
TATUS
> P
TATUS RT
> S
TATUS TATUS
The FXO port is in an idle state for LS configurations, and tip is grounded
in GS configurations.
The FXO port has detected ring ground.
The FXO port has detected an off hook condition (loop current flowing).
The FXO port has reversed T/R polarity.
The FXO port is detecting ringing condition on the interface.
The FXO port tip conductor is high impedance. This is an idle condition
for GS trunks.
No information about the FXO port is available.
The port is preconfigured, but the FXO module is not present.
The FXO port is present and available for use.
The FXO port is present, but not available for use.
The FXO module is present, but the port is not mapped.
This generic FXO port test indicator is used when multiple tests are being
run or the test is not a 2W test.
Loop open test is currently running.
Loop closed test is currently running and normal T/R polarity is detected.
Loop closed test is currently running and no loop batter is detected.
Loop closed test is currently running and reverse T/R polarity is detected.
Tip Open test is currently running, but ring ground is detected.
> R ABCD
TATUS X
© 2004 ADTRAN, Inc.
Section 4 User Interface Guide
. The bit pattern is formatted
D P
IAL LAN
ESF
153