Register Settings - NEC MuPD78F0132H User Manual

5.8.5 Register settings

The table below shows the statuses of the setting flags and status flags when each mode is set.
f
CPU
High-speed system Ring-OSC oscillating
Note 2
clock
Ring-OSC stopped
High-speed system clock
Ring-OSC clock
oscillating
High-speed system clock stopped
Note 4
Subsystem clock High-speed system clock
oscillating, Ring-OSC oscillating
High-speed system clock stopped,
Ring-OSC oscillating
High-speed system clock
oscillating, Ring-OSC stopped
High-speed system clock stopped,
Ring-OSC stopped
Notes 1. Valid only when "can be stopped by software" is selected for Ring-OSC by the option byte.
2. Do not set MCC = 1 or MSTOP = 1 during high-speed system clock operation (even if MCC = 1 or
MSTOP = 1 is set, the high-speed system clock oscillation does not stop).
3. Do not set MCC = 1 during Ring-OSC operation (even if MCC = 1 is set, the high-speed system clock
oscillation does not stop). To stop high-speed system clock oscillation during Ring-OSC operation, use
MSTOP.
4. Shifting to subsystem clock operation mode must be performed from the high-speed system clock
operation mode. From subsystem clock operation mode, only high-speed system clock operation mode
can be shifted to.
5. Do not set MCM0 = 0 (shifting to Ring-OSC) during subsystem clock operation.
6. Do not set MSTOP = 1 during subsystem clock operation (even if MSTOP = 1 is set, high-speed system
clock oscillation does not stop). To stop high-speed system clock oscillation during subsystem clock
operation, use MCC.
CHAPTER 5 CLOCK GENERATOR
Table 5-7. Clock and Register Setting
Mode
PCC Register
MCC
0
0
0
Note 3
0
0
1
0
1
User's Manual U16899EJ2V0UD
Setting Flag
MCM MOC
Register Register Register
CSS MCM0 MSTOP RSTOP
0 1 0
0 1 0
0 0 0
0 0 1
Note 5 Note 6
1 1 0
Note 5 Note 6
1 1 0
Note 5 Note 6
1 1 0
Note 5 Note 6
1 1 0
Status Flag
RCM PCC MCM
Register Register
Note 1
CLS MCS
0 0 1
1 0 1
0 0 0
0 0 0
0 1 1
0 1 1
1 1 1
1 1 1
135