Toshiba TLCS-900/H1 Series Manual page 82

Original cmos 32-bit microcontroller
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3.6.4
Setting Example
This section explains how to set the DMAC using an example.
(1) Transferring music data from internal RAM to I
The 32 Kbytes of data stored in the internal RAM at addresses 2000H to 9FFFH
shall be transferred to FIFO-RAM via I
bytes (4 bytes x 16 times) shall be transferred to FIFO-RAM using DMAC channel 0.
Since INTI2S is an FIFO empty interrupt, the first data must be set in advance.
Therefore, only the first 64 bytes shall be transferred by DMA soft start. After 32
Kbytes have been transferred, the INTDMA0 interrupt routine shall be activated to
prepare for the next processing.
(a) Main routine
No
1
2
3
4
5
6
7
8
9
10
11
12
13
(b) INTDMA0 interrupt routine
No
1
2
3
4
5
6
7
8
9
10
11
Instruction
ldl
(hdmas0),2000H
ldl
(hdmad0),i2sbuf
ldw
(hdmaca0),16
ldw
(hdmacb0),512
ldb
(hdmam0),0AH
set
0,(hdmae)
ld
(dmar),01H
nop
ld
(dma0v),i2s_vector
ld
(intedma01),xxH
ldw
(i2sctl0),xxxxH
ldw
(i2sctl1),xxxxH
ei
xx
Instruction
res
0,(hdmae)
:
:
:
:
reti
92CF30-80
S by DMA transfer
2
S. Each time an INTI2S request is asserted, 64
2
Comments
; Source address = 2000H
; Destination address = i2sbuf
; Counter A = 16
; Counter B = 512 (32768/64)
; Transfer mode = source INC, 4 bytes
; Enable DMA channel 0.
; Transfer the first 64 bytes by DMA soft start.
;
; INTI2S = DMA0
; INTDMA level = x
2
; Set operation mode for I
S.
2
; Start I
S transmission.
; Enable CPU interrupts.
Comments
; Disable DMA channel 0.
;
TMP92CF30
2009-06-12

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