Toshiba TLCS-900/H1 Series Manual page 235

3. Read (including ECC data read)
Reading valid data
; ***** Read valid data*****
;
ldw
ldw
ldw
ldw
ldw
ldw
ldw
;
; Wait set up time (from Busy to Ready)
;
;
;
ldw
ldw
ldw
ldw
;
; Wait set up time (20 system clocks)
;
(1) Error bit calculation
ldw
ldw
;
; Wait set up time
; Interrupt routine (End of calculation for Reed-Solomon Error bit)
;
INT: ldw
;
; If error is found, the error processing routine is performed to
; correct the error data. For details see 3.11.4.2 "Error Correction
; Methods".
;
; The read operation is repeated four times to read 2112 bytes.
;
(ndfmcr0),5008h ; CE1 enable
(ndfmcr0),50A8h ; WE enable, CLE enable
(ndfdtr0),0000h ; Read command 1
(ndfmcr0),50C8h ; ALE enable
(ndfdtr0),00xxh ; Address write (4 or 5 times)
(ndfmcr0),50A8h ; WE enable, CLE enable
(ndfdtr0),0030h ; Read command 2
1. Flag polling
2. Interrupt
(ndfmcr0),540Dh ; ECC reset, ECC circuit enable, decode mode
xxxx,(ndfdtr0) ; Data read (259 times: 518 bytes)
(ndfmcr0),550Ch ; RSECGW enable
xxxx,(ndfdtr0) ; Read ECC (5 times: 80 bits)
(ndfmcr1),0047h ; Error bit calculation interrupt enable
(ndfmcr0),560Ch ; Error bit calculation circuit start
xxxx,(ndfmcr1) ; Check error status "STATE3:0, SEER1:0"
92CF30-233
(256-times:512 byte)
TMP92CF30
2009-06-12