Toshiba TLCS-900/H1 Series Manual page 200

Original cmos 32-bit microcontroller

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(4) Read data shift function

If the AC specifications of the SDRAM cannot be satisfied when data is read from the

SDRAM, the read data can be latched in a port circuit so that the CPU can read the data in the

next state. When this read data shift function is used, the read cycle requires additional one

state. The write cycle is not affected. The timing waveforms for various cases are shown below.

(a) 1-word read, the read data shift function disabled (SDACR<SRCS> = "0")

Internal system

Internal dat bus

(b) 1-word read, the read data shift function enabled (SDACR<SRDS> = "1",

<SRDSCK>= "0")

Internal system clock

Internal data bus

ColumnAddress

External data latch

CPU data read

ColumnAddress

CPU data read