Toshiba TLCS-900/H1 Series Manual page 490

3.19.2 Touch Screen Interface (TSI) Control Register
TSICR0 bit Symbol TSI7
(01F0H)
Read/Write
Reset State
Function 0: Disable
1: Enable
PXD (internal pull-down resistor) ON/OFF setting
PXEN
< >
<TSI7>
0
1
TSICR1 bit Symbol DBC7
(01F1H)
Read/Write
Reset State
Function 0: Disable
1: Enable
Note1: Since the CPU clock is used for the debounce circuit, the debounce circuit does not operate and also no
interrupts that bypass the debounce circuit are generated during IDLE1and STOP mode. During IDLE1 or
STOP mode, set this circuit to disable (Write "0" in TSICR1<DBC7>) before entering the HALT state. If
debounce time is set to "0", the signal is captured into the inside after a count of 6 system clocks (f
the point when this circuit is set to disable.
Note2: To avoid a flow-through current to the normal C-MOS input gate when converting analog input data by using
the AD converter, TSICR0<INGE> can be controlled. If the intermediate voltage is input, cut the input signal to
the C-MOS logic (P96,P97) by setting this bit. TSICR0<PTST> is to confirm the initial pen-touch. Note that,
when the input to the C-MOS logic is blocked by TSICR0<INGE>, this bit is always "1".
Note3: For example:
TSICR1=95H →N = 64 + 4 + 1 = 69, if set to (TSICR1) = 95H
TSI control register
7 6 5
INGE PTST
R/W R
0 0 0
Input gate Detection
control of condition
Port 96,97
0: no touch
0: Enable 1: touch
1: Disable
0 1
OFF OFF
ON OFF
Debounce time setting register
7 6 5
DB1024 DB256
0 0 0
1024 256
Debounce time is set by the formula "(N*64-16) / f
"N" is the number of bits between bit6 and bit0 which are set to "1". Note3:
4 3
TWIEN PYEN
0 0
INT4 SPY
interrupt 0 : OFF
control 1 : ON
0: Disable
1: Enable
4 3
DB64 DB8
R/W
0 0
64 8
92CF30-488
2 1
PXEN MYEN MXEN
R/W
0 0
SPX SMY SMX
0 : OFF 0 : OFF 0 : OFF
1 : ON 1 : ON 1 : ON
2 1
DB4 DB2 DB1
0 0
4 2
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2009-06-12