Toshiba TLCS-900/H1 Series Manual page 347

3.16.2.3 USBINTFRn, MRn Register
These SFRs control the INTUSB (only one interrupt to CPU) using the 23 interrupt
sources output by the UDC.
The USBINTMRn are mask registers and the USBINTFRn are flag registers. In the
INTUSB routine, execute operations according to generated interrupt source after
checking USBINTFRn.
The common specification for all MASK and FLAG registers is shown below.
Common specifications for all mask and flag registers.)
(
Mask register
Interrupt source
(Set by rising edge)
Flag register
Writing "0" to flag register
A: The flag register is not set because mask register = "1".
B: The flag register is not set because interrupt souce changes "1" → "0".
C: The flag register is set because mask register = "0" and interrupt souce changes "0" → "1".
D: The flag register is reset to "0" by writing "0" to flag register.
Note 1: The "INTUSB generated number" and "bit number which is set to flag register" are not always equal. In the
INTUSB interrupt routine, clear FLAG register (USBINTFRn) after checking it. The interrupt request flag,
which occurrs between the INTUSB interrupt routine and flag register (USBINTFRn) read, is kept in the
interrupt controller.
Therefore, after returning from the interrupt routine, the CPU jumps to INTUSB interrupt routine again.
Software support is required to avoid ending in an error routine when none of the bits in the flag register
(USBINTFRn) is set to "1".
Note 2: Disable INTUSB (write 00H to INTEUSB register) before writing to USBINTMRn or USBINTFRn.
A B
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C D
2009-06-12