Toshiba TLCS-900/H1 Series Manual page 308

Original cmos 32-bit microcontroller
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a.
Transmission
In SCLK output mode 8-bit data and a synchronous clock are output on the TXD0
and SCLK0 pins respectively each time the CPU writes the data to the Transmission
Buffer. When all data is output, INTES0 <ITX0C> will be set to generate the INTTX0
interrupt.
Timing of transmited
data writing
SCLK0 output
(<SCLKS> = "0":
rising edge mode)
SCLK0 output
(<SCLKS> = "1":
falling edge mode)
TXD0
ITX0C
(INTTX0 interrupt
request)
Figure 3.14.20 Transmitting Operation in I/O Interface Mode (SCLK0 Output Mode)
In SCLK Input Mode, 8-bit data is output on the TXD0 pin when the SCLK0 input
becomes active after the data has been written to the Transmission Buffer by the CPU.
When all data is output, INTES0 <ITX0C> will be set to generate INTTX0 interrupt.
SCLK0 input
(<SCLKS> = "0":
rising edge mode)
SCLK0 input
(<SCLKS> = "1":
falling edge mode)
TXD0
ITX0C
(INTTX0 intterrupt
reqest)
Figure 3.14.21 Transmitting Operation in I/O Interface Mode (SCLK0 Input Mode)
Bit0
Bit1
Bit0
Bit1
Bit5
92CF30-306
Bit6
Bit7
Bit6
Bit7
TMP92CF30
(Internal clock
timing)
2009-06-12

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