Toshiba TLCS-900/H1 Series Manual page 470

Original cmos 32-bit microcontroller
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(4) SPI CRC Register (SPICR)
The SPICR register contains the CRC calculation result for transmit/receive data.
SPICR
Bit Symbol
CRCD7
(0826H)
Read/Write
Reset State
Function
(0827H)
Bit Symbol
CRCD15
Read/Write
Reset State
Function
(a) CRCD15:0
The CRC result which is calculated according to the settings of the CRC16_7_b,
CRCRX_TX_B and CRCRESET_B bits in the SPICT register are loaded into this
register. When using the CRC16 algorithm, all the bits participate in the CRC
generation. When using the CRC7 algorithm, only the lower seven bits participates in
the CRC generation. The following describes the steps required to calculate the CRC16
for the transmit data.
First, initialize the CRC calculation register by writing a "1" to the CRCRESET_B
bit after programming three bits as follows: CRC16_7_b = "1", CRCRX_TX_B = "0", and
CRCRESET_B = "0".
Then, by writing the transmit data into the SPITD register, complete the
transmission of all bits, for which the CRC should be calculated.
The SPIST<TEND> bit should be checked to confirm whether the reception is
completed.
By reading the SPICR register after the transmission is completed, the CRC16 for
the transmit data can be obtained.
Note: The CRC is generated upon data input and output of the TMP92CF30 as illustrated below. The timing of the
CRC comparison should be fully considered when performing Sequential-mode transmit and receive
operation using the FIFOs.
16 bits
16 bits
SPICR Register
7
6
5
CRCD6
CRCD5
0
0
0
15
14
13
CRCD14
CRCD13
0
0
0
Figure 3.17.11 SPICR Register
TMP92CF30
92CF30-468
4
3
2
CRCD4
CRCD3
CRCD2
R
0
0
CRC result bits [7:0]
12
11
10
CRCD12
CRCD11
CRCD10
R
0
0
CRC result bits [15:8]
100kΩ
SPDO
100kΩ
SPDI
CRC generation timing
TMP92CF30
1
0
CRCD1
CRCD0
0
0
0
9
8
CRCD9
CRCD8
0
0
0
SPI Slave
DI
DO
2009-06-12

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