Toshiba TLCS-900/H1 Series Manual page 58

(2) Soft start function
The TMP92CF30 can initiate micro DMA/HDMA either with an interrupt or by
using the micro DMA /HDMA soft start function, in which micro DMA or HDMA is
initiated by a Write cycle which writes to the register DMAR.
Writing "1" to each bit of DMAR register causes micro DMA or HDMA to be
performed once (If write "0" to each bit, micro DMA doesn't operate). On completion of
the transfer, the bits of DMAR for the completed channel are automatically cleared to
"0".
When writing again "1" to it, soft start can execute continuously until the DMA
transfer counter (DMACn) or HDMA transfer counter B (HDMACBn) become "0".
When a burst is specified by the register DMAB, data is transferred continuously
from the initiation of micro DMA until the value in the micro DMA transfer counter is
"0". If execatee soft start during micro DMA transfer by interrupt source, micro DMA
transfer counter doesn't change. Don't use Read-modify-write instruction to avoid
writign to other bits by mistake.
Note1: If it is started by software, don't set any channels to start in same time.
Note2: If be started sequentially, restart it after confirming micro DMA of all channels is completed (all micro DMA are
set to "0").
Symbol Name Address
109H
DMA
DMAR (Prohibit
Request
RMW)
(3) Transfer control registers
The transfer source address and the transfer destination address are set in the
following registers. An instruction of the form LDC cr,r can be used to set these
registers.
Channel 0
Channel 7
7 6
DREQ7 DREQ6
0 0
DMAS0
DMAD0
DMAC0
DMAM0
DMAS7
DMAD7
DMAC7
DMAM7
8 bits
16 bits
32 bits
5 4
DREQ5 DREQ4
R/W
0 0
1: Start DMA
Micro DMA source address register 0
Micro DMA destination address register 0
Micro DMA counter register 0
Micro DMA mode register 0
Micro DMA source address register 7
Micro DMA destination address register 7
Micro DMA counter register 7
Micro DMA mode register 7
92CF30-56
TMP92CF30
3 2 1
DREQ3 DREQ2 DREQ1
0 0 0
0
DREQ0
0
2009-06-12