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Expansion Format of Extended Instructions (4)
Extended instruction
Opcode
Operand
xadd.a
%rd, imm24
xsub.a
Example) xsub.a %rd, imm24
%sp, imm24
Example) xadd.a %sp, imm24
scmp
%rd, imm16
scmc
Example) scmp %rd, imm16
scmp.a
%rd, imm20
Example) scmp.a %rd, imm20
xcmp
%rd, imm16
xcmc
Example) xcmc %rd, imm16
xcmp.a
%rd, imm24
Example) xcmp.a %rd, imm24
sand
%rd, imm16
soor
sxor
snot
Example) sand %rd, imm16
xand
%rd, imm16
xoor
xxor
xnot
Example) xoor %rd, imm16
Remarks
Condition 1
imm24≤0x7f
sub.a %rd, imm24(6:0)
imm24≤0x7f
add.a %sp, imm24(6:0)
imm16≤0x7f
cmp
%rd, imm16(6:0)
imm20≤0x7f
cmp.a %rd, imm20(6:0)
imm16≤0x7f
cmc
%rd, imm16(6:0)
imm24≤0x7f
cmp.a %rd, imm24(6:0)
imm16≤0x7f
and
%rd, imm16(6:0)
imm16≤0x7f
or
%rd, imm16(6:0)
Expansion format
Condition 2
0x7f<imm24≤0xfffff
ext
imm24(19:7)
sub.a %rd, imm24(6:0)
0x7f<imm24≤0xfffff
ext
imm24(19:7)
add.a %sp, imm24(6:0)
0x7f<imm16
ext
imm16(15:7)
cmp
%rd, imm16(6:0)
0x7f<imm20
ext
imm20(19:7)
cmp.a %rd, imm20(6:0)
0x7f<imm16
ext
imm16(15:7)
cmc
%rd, imm16(6:0)
0x7f<imm24≤0xfffff
ext
imm24(19:7)
cmp.a %rd, imm24(6:0)
0x7f<imm16
ext
imm16(15:7)
and
%rd, imm16(6:0)
0x7f<imm16
ext
imm16(15:7)
or
%rd, imm16(6:0)
Assembly Programming
Condition 3
0xfffff<imm24
ext
imm24(23:20)
ext
imm24(19:7)
sub.a %rd, imm24(6:0)
0xfffff<imm24
ext
imm24(23:20)
ext
imm24(19:7)
add.a %sp, imm24(6:0)
–
–
–
0xfffff<imm24
ext
imm24(23:20)
ext
imm24(19:7)
cmp.a %rd, imm24(6:0)
–
–
Reference
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