Comparison Instructions - Epson S5U1C17001C Manual

Cmos 16-bit single chip microcomputer, c compiler package for s1c17 family
Hide thumbs Also See for S5U1C17001C:
Table of Contents

Advertisement

8.6.2 Comparison instructions

Types and functions of extended instructions
Extended instruction
scmp
%rd,imm16
scmc
%rd,imm16
scmp.a
%rd,imm20
xcmp
%rd,imm16
xcmc
%rd,imm16
xcmp.a
%rd,imm24
These extended instructions allow you to compare a general-purpose register and a 16-bit/20-bit/24-bit
immediate.
A conditional operation option (/c, /nc) cannot be specified in the extended instructions.
Basic instructions after expansion
Expanded into the cmp instruction
scmp, xcmp
Expanded into the cmc instruction
scmc, xcmc
Expanded into the cmp.a instruction
scmp.a, xcmp.a
Expansion formats
(1) sOP
%rd,imm16 / xOP
Example: xcmp
%rd,imm16
imm16 ≤ 0x7f
cmp
%rd,imm16(6:0)
(2) scmp.a
%rd,imm20
imm20 ≤ 0x7f
cmp.a
%rd,imm20(6:0)
(3) xcmp.a
%rd,imm24
imm24 ≤ 0x7f
cmp.a
%rd,imm24(6:0)
S5U1C17001C ManUal
(C COMPilEr PaCkagE fOr S1C17 faMily) (Ver. 1.5.0)
%rd-imm16
%rd-imm16-C
%rd-imm20
%rd-imm16
%rd-imm16-C
%rd-imm24
(OP = cmp, cmc)
%rd,imm16
0x7f < imm16
ext
imm16(15:7)
cmp
%rd,imm16(6:0)
0x7f < imm20
ext
imm20(19:7)
cmp.a
%rd,imm20(6:0)
0x7f < imm24 ≤ 0xfffff
ext
imm24(19:7)
cmp.a
%rd,imm24(6:0)
EPSOn
function
(Sets/resets C, V, Z and N flags in PSR)
(Sets/resets C, V, Z and N flags in PSR)
(Sets/resets C, V, Z and N flags in PSR)
(Sets/resets C, V, Z and N flags in PSR)
(Sets/resets C, V, Z and N flags in PSR)
(Sets/resets C, V, Z and N flags in PSR)
0xfffff < imm24
ext
imm24(23:20)
ext
imm24(19:7)
cmp.a
%rd,imm24(6:0)
8 aSSEMBlEr
Expansion
(1)
(1)
(2)
8
(1)
Assemblr
(1)
(3)
8-15

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the S5U1C17001C and is the answer not in the manual?

Subscribe to Our Youtube Channel

Table of Contents