c17 int_load
(load interrupt event file)
Operation
Loads an interrupt event file.
When an event condition written in the event file that has been loaded is met during program execution, the
designated interrupt occurs.
Event file format
Address_NMI_INT_Vector_Level_RES
Address_NMI_INT_Vector_Level_RES
Address_NMI_INT_Vector_Level_RES
Address_NMI_INT_Vector_Level_RES
:
Address_NMI_INT_Vector_Level_RES
Address: Address to generate an event (000000–fffffe)
An interrupt occurs when the PC reaches this address.
NMI:
1 = NMI request
0 = No NMI request
INT:
1 = Interrupt request specified with the Vector and Level below
0 = No interrupt request
Vector: Interrupt vector number (00–1f, valid when INT = 1)
Interrupt level (0–7, valid when INT = 1)
Level:
1 = Reset request
RES:
0 = No reset request
The order of interrupt priority is RES > NMI > Vector.
A comment (alphanumeric characters) with "//" prefixed can be written on the right of each event line.
Format
c17 int_load Filename
Filename: Interrupt event file name
Usage example
(gdb) c17 int_load event.txt
Loads the interrupt event file event.txt.
Example of event file
009002_0_1_10_3_0
009f02_0_0_00_0_1
004030_1_1_1c_7_0
004030_0_1_1c_7_1
Notes
• The c17 int_load command can only be used in simulator mode.
• If the c17 rst command is executed when an interrupt event file has been loaded, the event sequence is
reset so that the events will be generated from the first line again.
• Up to 256 events (event lines) can be written in an interrupt event file.
• Up to 300 characters can be written in an event line.
S5U1C17001C ManUal
(C COMPilEr PaCkagE fOr S1C17 faMily) (Ver. 1.5.0)
// Comment
An interrupt of which the interrupt vector number = 0x10 and interrupt level
= 3 occurs when PC = 0x9002.
A reset exception occurs when PC = 0x9f02.
An NMI occurs when PC = 0x4030. After that an interrupt of which
the interrupt vector number = 0x1c and interrupt level = 7 occurs when
interrupts are enabled.
A reset exception occurs when PC = 0x4030. Although an interrupt vector
number (= 0x1c) and an interrupt level (= 7) has been written, no interrupt
will occur even when interrupts are enabled because the INT parameter is set
to 0.
EPSOn
10 DEBUggEr
[SIM]
10
Debugger
10-93
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