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Instruction List (10)
Mnemonic
Classification
Opcode
Conversion
cv.ab
%rd, %rs
cv.as
%rd, %rs
cv.al
%rd, %rs
cv.la
%rd, %rs
cv.ls
%rd, %rs
Imm extension
ext
imm13
System control
nop
halt
slp
ei
di
Coprocessor
ld.cw
%rd, %rs
%rd, imm7
sld.cw
%rd, imm20
%rd, symbol±imm20
xld.cw
%rd, imm24
%rd, symbol±imm24
ld.ca
%rd, %rs
%rd, imm7
sld.ca
%rd, imm20
%rd, symbol±imm20
xld.ca
%rd, imm24
%rd, symbol±imm24
ld.cf
%rd, %rs
%rd, imm7
sld.cf
%rd, imm20
%rd, symbol±imm20
xld.cf
%rd, imm24
%rd, symbol±imm24
Remarks
Operand
rd(23:8)←rs(7), rd(7:0)←rs(7:0)
rd(23:16)←rs(15), rd(15:0)←rs(15:0)
rd(23:16)←rs(7:0), rd(15:0)←rd(15:0)
rd(23:8)←0, rd(7:0)←rs(23:16)
rd(23:16)←0, rd(15:0)←rs(15)
Extends the immediate or operand of the following instruction.
No operation
HALT mode
SLEEP mode
psr(IE)←1
psr(IE)←0
co_dout0←rd, co_dout1←rs
co_dout0←rd, co_dout1←imm7
co_dout0←rd, co_dout1←imm20
co_dout0←rd, co_dout1←symbol±imm20
co_dout0←rd, co_dout1←imm24
co_dout0←rd, co_dout1←symbol±imm24
co_dout0←rd, co_dout1←rs, rd←co_din, psr(C, V, Z, N)←co_cvzn
co_dout0←rd, co_dout1←imm7, rd←co_din, psr(C, V, Z, N)←co_cvzn
co_dout0←rd, co_dout1←imm20, rd←co_din, psr(C, V, Z, N)←co_cvzn
co_dout0←rd, co_dout1←symbol±imm20, rd←co_din, psr(C, V, Z, N)←co_cvzn
co_dout0←rd, co_dout1←imm24, rd←co_din, psr(C, V, Z, N)←co_cvzn
co_dout0←rd, co_dout1←symbol±imm24, rd←co_din, psr(C, V, Z, N)←co_cvzn
co_dout0←rd, co_dout1←rs, psr(C, V, Z, N)←co_cvzn
co_dout0←rd, co_dout1←imm7, psr(C, V, Z, N)←co_cvzn
co_dout0←rd, co_dout1←imm20, psr(C, V, Z, N)←co_cvzn
co_dout0←rd, co_dout1←symbol±imm20, psr(C, V, Z, N)←co_cvzn
co_dout0←rd, co_dout1←imm24, psr(C, V, Z, N)←co_cvzn
co_dout0←rd, co_dout1←symbol±imm24, psr(C, V, Z, N)←co_cvzn
Function
Assembly Programming
Flags
D
IL
IE
C
V
Z
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