Data Transfer Instructions (Between Memory And Register) - Epson S5U1C17001C Manual

8 aSSEMBlEr

8.6.5 Data Transfer instructions (between Memory and register)

Types and functions of extended instructions
Extended instruction
sld.b %rd,[imm20]
sld.ub %rd,[imm20]
sld %rd,[imm20]
sld.a %rd,[imm20]
sld.b [imm20],%rs
sld [imm20],%rs
sld.a [imm20],%rs
xld.b %rd,[imm24]
xld.ub %rd,[imm24]
xld %rd,[imm24]
xld.a %rd,[imm24]
xld.b [imm24],%rs
xld [imm24],%rs
xld.a [imm24],%rs
These extended instructions allow memory locations to be accessed by specifying the address with a 20-bit/24-
bit immediate. However, the postincrement function ([]+) cannot be used.
Basic instructions after expansion
sld.b, xld.b
sld.ub, xld.ub
sld, xld
sld.a, xld.a
Expansion formats
(1) sOP
%rd,[imm20]
sOP [imm20],%rs
Example: sld.a
%rd,[imm20]
imm20 ≤ 0x7f
ld.a %rd,[imm20(6:0)]
(2) xOP
%rd,[imm24]
xOP [imm24],%rs
Example: xld.a
%rd,[imm24]
imm24 ≤ 0x7f
ld.a %rd,[imm24(6:0)]
8-18
%rd ← B[imm20] (with sign extension)
%rd ← B[imm20] (with zero extension)
%rd ← W[imm20]
%rd ← A[imm20](23:0) , ignored ← A[imm20](31:24)
B[imm20] ← %rs(7:0)
W[imm20] ← %rs(15:0)
A[imm20](23:0) ← %rs(23:0) , A[imm20](31:24) ← 0
%rd ← B[imm24] (with sign extension)
%rd ← B[imm24] (with zero extension)
%rd ← W[imm24]
%rd ← A[imm24](23:0) , ignored ← A[imm24](31:24)
B[imm24] ← %rs(7:0)
W[imm24] ← %rs(15:0)
A[imm24](23:0) ← %rs(23:0) , A[imm24](31:24) ← 0
Expanded into the ld.b instruction
Expanded into the ld.ub instruction
Expanded into the ld instruction
Expanded into the ld.a instruction
(OP = ld.b, ld.ub, ld, ld.a)
(OP = ld.b, ld, ld.a)
ext imm20(19:7)
ld.a %rd,[imm20(6:0)]
(OP = ld.b, ld.ub, ld, ld.a)
(OP = ld.b, ld, ld.a)
0x7f < imm24 ≤ 0xfffff
ext imm24(19:7)
ld.a %rd,[imm24(6:0)]
function
0x7f < imm20
ext
ext
ld.a
EPSOn
(C COMPilEr PaCkagE fOr S1C17 faMily) (Ver. 1.5.0)
Expansion
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
0xfffff < imm24
imm24(23:20)
imm24(19:7)
%rd,[imm24(6:0)]
S5U1C17001C ManUal