General-purpose Input / High-speed counter Function
23.3 General-purpose Input / High-speed Counter Related
Instruction
23.3.1 [F0 MV] High-speed counter control instruction
Perform controls such as software reset, count disabling, high-speed counter instruction clear.
Instruction format
R0
DF
(
)
Operand
Operand
Settings
S
The area or constant data in which high-speed counter control code is saved.
Memory area type that can be specified (A: Available)
Operand
WX
WY
S
A
Operation description
• Perform high-speed counter control which corresponds to the control code designated by "S".
• This instruction is used when high-speed counter performs below operation.
① Software reset, ② count is disabled, ③ External input makes reset input invalid, ④ When
the control executed by high-speed counter instruction F166 - F167 is canceled, clear target
value is interrupted.
• Once the control code is written, it will maintain till next writing.
• Control code written via F0 (MV) instruction is also saved to control code monitoring area
when written in special register DT90052. Only lower 8 bits are written.
Precautions for programming
• The setting which is reset input invalid will become valid only when system register is used
to allocate reset input.
• The external reset input setting can be used to switch the reset input (X6 or X7) allocated to
mainframe input to valid or invalid.
23-8
F0 MV
F0 MV
WR
WL
SV
A
A
A
A
H1
DT90052
H0
DT90052
S
EV
DT
LD
I
A
A
A
A
Constant
Index
modifier
K
H
A
A
A