IDEC SmartRelay functions
4.2.2
AND with Edge Detection
The output of an edge triggered AND is only 1 if all inputs are
1 and if at least one input was low in the previous cycle.
At an unused block input (x): x = 1.
Timing diagram for the AND with Edge Detection
Cycle
4.2.3
NAND (not AND)
Parallel circuit with multiple normally
closed contacts in the circuit diagram:
The output of the NAND is only 0 if the status at all inputs is
1, i.e. the contacts are closed.
At an unused block input (x): x = 1.
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Symbol in IDEC SmartRelay:
1
2
3
4
Q
1
2
3
4
5
6
7
8
9
10
Symbol in IDEC
SmartRelay:
IDEC SmartRelay Manual