Performance Considerations - Alcatel-Lucent 7450 Basic System Configuration Manual

Ethernet service switch /service router /extensible routing system
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When using IEEE 1588v2 for distribution of a frequency reference, the slave calculates a
message delay from the master to the slave based on the timestamps exchanged. A sequence
of these calculated delays will contain information of the relative frequencies of the master
clock and slave clock but will have noise component related to the packet delay variation
(PDV) experienced across the network. The slave must filter the PDV effects so as to extract
the relative frequency data and then adjust the slave frequency to align with the master
frequency.
When using IEEE 1588v2 for distribution of time, the 7750 SR and 7450 ESS use the four
timestamps exchanged using the IEEE 1588v2 messages to determine the offset between the
router time base and the external master clock time base. The router determines the offset
adjustment and then in between these adjustments, the router maintains the progression of
time using the frequency from the central clock of the router. This allows time to be
maintained using a BITS input source or a Synchronous Ethernet input source even if the
IEEE 1588v2 communications fail. When using IEEE 1588v2 for time distribution, the
central clock should at a minimum have a system timing input reference enabled.
1588
Messages

Performance Considerations

Although IEEE 1588v2 can be used on a network that is not PTP-aware, the use of PTP-aware
network elements (boundary clocks) within the packet switched network improves
synchronization performance by reducing the impact of PDV between the grand master clock
and the slave clock. In particular, when IEEE 1588v2 is used to distribute high accuracy time,
such as for mobile base station phase requirements, then the network architecture requires the
deployment of PTP awareness in every device between the Grandmaster and the mobile base
station slave.
Basic System Configuration Guide
Figure 19: Using IEEE 1588v2 For Time Distribution
bits
ref1
ref2
ptp
Frequency
Recovered
From 1588
Message
Exchange
Periodic Time
Offset Calculated
From 1588
Message
Exchange
1588 Slave
Port
Central Clock
Frequency
Module
Central
Clock
Frequency
Output
Timestamps
Based on Offsets
And Central Clock
Frequency
Central Clock
Time Module
System Management
1588
Messages
1588 Master
Ports
OSSG733
269

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