Performance Considerations; Table 33: Provisioned Iom Card Behavior - Alcatel-Lucent 7450 ESS-12 Configuration Manual

When using IEEE 1588v2 for distribution of a frequency reference, the slave calculates a message
delay from the master to the slave based on the timestamps exchanged. A sequence of these
calculated delays will contain information of the relative frequencies of the master clock and slave
clock but will have noise component related to the packet delay variation (PDV) experienced
across the network. The slave must filter the PDV effects so as to extract the relative frequency
data and then adjust the slave frequency to align with the master frequency.
When using IEEE 1588v2 for distribution of time, the 7450 ESS uses the four timestamps
exchanged using the IEEE 1588v2 messages to determine the offset between the 7450 ESS time
base and the external master clock time base. The 7450 ESS determines the offset adjustment and
then in between these adjustments, the 7450 ESS maintains the progression of time using the
frequency from the central clock of the node. This allows time to be maintained using a BITS
input source or a Synchronous Ethernet input source even if the IEEE 1588v2 communications
fail. When using IEEE 1588v2 for time distribution, the central clock should at a minimum have
the PTP input reference enabled.
Messages

Performance Considerations

Although IEEE 1588v2 can be used on a network that is not PTP-aware, the use of PTP-aware
network elements (boundary clocks) within the packet switched network improves
synchronization performance by reducing the impact of PDV between the grand master clock and
the slave clock. In particular, when IEEE 1588v2 is used to distribute high accuracy time, such as
for mobile base station phase requirements, then the network architecture requires the deployment
of PTP awareness in every device between the Grandmaster and the mobile base station slave.
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bits
ref1
ref2
ptp
Frequency
Recovered
From 1588
Message
Exchange
1588
1588 Slave
Port
Figure 13: Using IEEE 1588v2 For Time Distribution
Central Clock
Frequency
Module
Central
Clock
Frequency
Output
Periodic Time
Offset Calculated
From 1588
Message
Exchange
Central Clock
Time Module
7450 ESS OS Basic System Configuration Guide
Timestamps
Based on Offsets
And Central Clock
Frequency
1588 Master
Ports
1588
Messages
OSSG733