Active Node Flags; Sysmac Link/Sysmac Net Link System Service Time - Omron SYSMAC C200HS Operation Manual

AR Area

3-5-7 Active Node Flags

Level 0 Level 1
AR 08 AR 12
AR 09 AR 13
AR 10 AR 14
AR 11 AR 15
*Communication Controller Error Flag
**EEPROM Error Flag

3-5-8 SYSMAC LINK/SYSMAC NET Link System Service Time

3-5-9 Calendar/Clock Area and Bits
Calendar/Clock Area
Calendar/Clock Bits
Bits
AR 1800 to AR 1807 Seconds
AR 1808 to AR 1815 Minutes
AR 1900 to AR 1907 Hours
AR 1908 to AR 1915 Day of month
AR 2000 to AR 2007 Month
AR 2008 to AR 2015 Year
AR 2100 to AR 2107 Day of week
52
AR 0714 (Error History Reset Bit) is turned ON and then OFF by the user to reset
the Error Record Pointer (DM 0969) and thus restart recording error records at
the beginning of the history area.
AR 0715 (Error History Enable Bit) is turned ON by the user to enable error histo-
ry storage and turned OFF to disable error history storage.
Refer to 3-6 DM Area for details on the Error History Area.
Error history bits are refreshed each cycle.
AR 08 through AR 11 and AR 12 through AR 15 provide flags that indicate which
nodes are active in the SYSMAC LINK System at the current time. These flags
are refreshed every cycle while the SYSMAC LINK System is operating.
The body of the following table show the node number assigned to each bit. If the
bit is ON, the node is currently active.
Bit (body of table shows node numbers)
00 01 02 03 04
1 2 3 4 5
17 18 19 20 21
33 34 35 36 37
49 50 51 52 53
AR 16 provides the time allocated to servicing operating level 0 of the SYSMAC
LINK System and/or SYSMAC NET Link System during each cycle when a SYS-
MAC LINK Unit and/or SYSMAC NET Link Unit is mounted to a Rack.
AR 17 provides the time allocated to servicing operating level 1 of the SYSMAC
LINK System and/or SYSMAC NET Link System during each cycle when a SYS-
MAC LINK Unit and/or SYSMAC NET Link Unit is mounted to a Rack.
These times are recorded in 4-digit BCD to tenths of a millisecond (000.0 ms to
999.9 ms) and are refreshed every cycle.
15 to 12 11 to 08
2 1
10 10
A clock is built into the C200HS CPUs. If AR 2114 (Clock Stop Bit) is OFF, then
the date, day, and time will be available in BCD in AR 18 to AR 20 and AR 2100 to
AR 2108 as shown below. This area can also be controlled with AR 2113 (30-se-
cond Compensation Bit) and AR 2115 (Clock Set Bit).
Contents
00 to 59
00 to 59
00 to 23 (24-hour system)
01 to 31 (adjusted by month and for leap year)
1 to 12
00 to 99 (Rightmost two digits of year)
00 to 06 (00: Sunday; 01: Monday; 02: Tuesday; 03: Wednesday; 04:
Thursday; 05: Friday; 06: Saturday)
05 06 07 08 09
6 7 8 9 10
22 23 24 25 26
38 39 40 41 42
54 55 56 57 58
Bits
07 to 04 03 to 00
0 –1
10 10
Possible values
Section 3-5
10 11 12 13 14
11 12 13 14 15
27 28 29 30 31
43 44 45 46 47
59 60 61 62 *
15
16
32
48
**