Xilinx VCU118 User Manual page 71

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Table 3-21: VCU118 Board FPGA U1 to PCIe Edge U2 Connections (Cont'd)
FPGA (U1) Pin
AF1
AG4
AG3
AH2
AH1
AJ4
AJ3
AK2
AK1
AM2
AM1
AP2
AP1
AT2
AT1
AV2
AV1
AY2
AY1
BB2
BB1
For additional information about UltraScale PCIe functionality, see UltraScale Architecture
Gen3 Integrated Block for PCI Express LogiCORE IP Product Guide (PG156)
information about the PCI Express standard is available at the PCI Express® standard
website
[Ref
23].
VCU118 Board User Guide
UG1224 (v1.0) December 15, 2016
FPGA (U1) Pin
Schematic Net
Name
MGTYRXN2_226
PCIE_RX5_N
MGTYRXP1_226
PCIE_RX6_P
MGTYRXN1_226
PCIE_RX6_N
MGTYRXP0_226
PCIE_RX7_P
MGTYRXN0_226
PCIE_RX7_N
MGTYRXP3_225
PCIE_RX8_P
MGTYRXN3_225
PCIE_RX8_N
MGTYRXP2_225
PCIE_RX9_P
MGTYRXN2_225
PCIE_RX9_N
MGTYRXP1_225
PCIE_RX10_P
MGTYRXN1_225
PCIE_RX10_N
MGTYRXP0_225
PCIE_RX11_P
MGTYRXN0_225
PCIE_RX11_N
MGTYRXP3_224
PCIE_RX12_P
MGTYRXN3_224
PCIE_RX12_N
MGTYRXP2_224
PCIE_RX13_P
MGTYRXN2_224
PCIE_RX13_N
MGTYRXP1_224
PCIE_RX14_P
MGTYRXN1_224
PCIE_RX14_N
MGTYRXP0_224
PCIE_RX15_P
MGTYRXN0_224
PCIE_RX15_N
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Chapter 3: Board Component Descriptions
Name
Pin Num
B38
B41
B42
B45
B46
B50
B51
B54
B55
B58
B59
B62
B63
B66
B67
B70
B71
B74
B75
B78
B79
PCIe Edge U2
Pin Name
HSON(5)
HSOP(6)
HSON(6)
HSOP(7)
HSON(7)
HSOP(8)
HSON(8)
HSOP(9)
HSON(9)
HSOP(10)
HSON(10)
HSOP(11)
HSON(11)
HSOP(12)
HSON(12)
HSOP(13)
HSON(13)
HSOP(14)
HSON(14)
HSOP(15)
HSON(15)
[Ref
8]. Additional
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