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Table 3-11: VCU118 FPGA U1 GTY Transceiver Bank 125 Connections
FPGA
MGT
FPGA (U1) Pin
(U1)
Bank
Name
Pin
AC40
MGTYTXP0_125
AC41
MGTYTXN0_125
AC45
MGTYRXP0_125
AC46
MGTYRXN0_125
AA40
MGTYTXP1_125
AA41
MGTYTXN1_125
AB43
MGTYRXP1_125
AB44
MGTYRXN1_125
W40
MGTYTXP2_125
GTY
W41
MGTYTXN2_125
Bank
AA45
MGTYRXP2_125
125
AA46
MGTYRXN2_125
U40
MGTYTXP3_125
U41
MGTYTXN3_125
Y43
MGTYRXP3_125
Y44
MGTYRXN3_125
AB38
MGTREFCLK0P_125
AB39
MGTREFCLK0N_125
Y38
MGTREFCLK1P_125
Y39
MGTREFCLK1N_125
VCU118 Board User Guide
UG1224 (v1.0) December 15, 2016
Schematic Net Name
FMCP_HSPC_DP12_C2M_P
FMCP_HSPC_DP12_C2M_N
FMCP_HSPC_DP12_M2C_P
FMCP_HSPC_DP12_M2C_N
FMCP_HSPC_DP13_C2M_P
FMCP_HSPC_DP13_C2M_N
FMCP_HSPC_DP13_M2C_P
FMCP_HSPC_DP13_M2C_N
FMCP_HSPC_DP14_C2M_P
FMCP_HSPC_DP14_C2M_N
FMCP_HSPC_DP14_M2C_P
FMCP_HSPC_DP14_M2C_N
FMCP_HSPC_DP15_C2M_P
FMCP_HSPC_DP15_C2M_N
FMCP_HSPC_DP15_M2C_P
FMCP_HSPC_DP15_M2C_N
FMCP_HSPC_GBTCLK3_M2C_C_P
FMCP_HSPC_GBTCLK3_M2C_C_N
FMCP_HSPC_GBT1_3_P
FMCP_HSPC_GBT1_3_N
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Chapter 3: Board Component Descriptions
Connected
Connected Pin
Pin
Name
Z28
DP12_C2M_P
Z29
DP12_C2M_N
Y14
DP12_M2C_P
Y15
DP12_M2C_N
Y30
DP13_C2M_P
Y31
DP13_C2M_N
Z16
DP13_M2C_P
Z17
DP13_M2C_N
M18
DP14_C2M_P
M19
DP14_C2M_N
Y18
DP14_M2C_P
Y19
DP14_M2C_N
M22
DP15_C2M_P
M23
DP15_C2M_N
Y22
DP15_M2C_P
Y23
DP15_M2C_N
L8
GBTCLK3_M2C_P
L9
GBTCLK3_M2C_N
13
Q3_P
14
Q3_N
Send Feedback
Connected
Device
FMC+ HSPC J22
U39 ICS855S006I
clock buffer
57
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