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Table 3-13: VCU118 FPGA U1 GTY Transceiver Bank 127 Connections
FPGA
MGT
FPGA (U1) Pin
(U1)
Bank
Name
Pin
H42
MGTYTXP0_127
H43
MGTYTXN0_127
L45
MGTYRXP0_127
L46
MGTYRXN0_127
F42
MGTYTXP1_127
F43
MGTYTXN1_127
J45
MGTYRXP1_127
J46
MGTYRXN1_127
D42
MGTYTXP2_127
GTY
D43
MGTYTXN2_127
Bank
G45
MGTYRXP2_127
127
G46
MGTYRXN2_127
B42
MGTYTXP3_127
B43
MGTYTXN3_127
E45
MGTYRXP3_127
E46
MGTYRXN3_127
R40
MGTREFCLK0P_127
R41
MGTREFCLK0N_127
N40
MGTREFCLK1P_127
N41
MGTREFCLK1N_127
VCU118 Board User Guide
UG1224 (v1.0) December 15, 2016
Schematic Net Name
FMCP_HSPC_DP16_C2M_P
FMCP_HSPC_DP16_C2M_N
FMCP_HSPC_DP16_M2C_P
FMCP_HSPC_DP16_M2C_N
FMCP_HSPC_DP17_C2M_P
FMCP_HSPC_DP17_C2M_N
FMCP_HSPC_DP17_M2C_P
FMCP_HSPC_DP17_M2C_N
FMCP_HSPC_DP18_C2M_P
FMCP_HSPC_DP18_C2M_N
FMCP_HSPC_DP18_M2C_P
FMCP_HSPC_DP18_M2C_N
FMCP_HSPC_DP19_C2M_P
FMCP_HSPC_DP19_C2M_N
FMCP_HSPC_DP19_M2C_P
FMCP_HSPC_DP19_M2C_N
FMCP_HSPC_GBTCLK4_M2C_C_P
FMCP_HSPC_GBTCLK4_M2C_C_N
FMCP_HSPC_GBT1_4_P
FMCP_HSPC_GBT1_4_N
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Chapter 3: Board Component Descriptions
Connected
Connected Pin
Pin
Name
M26
DP16_C2M_P
M27
DP16_C2M_N
Z32
DP16_M2C_P
Z33
DP16_M2C_N
M30
DP17_C2M_P
M31
DP17_C2M_N
Y34
DP17_M2C_P
Y35
DP17_M2C_N
M34
DP18_C2M_P
M35
DP18_C2M_N
Z36
DP18_M2C_P
Z37
DP18_M2C_N
M38
DP19_C2M_P
M39
DP19_C2M_N
Y38
DP19_M2C_P
Y39
DP19_M2C_N
L4
GBTCLK4_M2C_P
L5
GBTCLK4_M2C_N
16
Q4_P
17
Q4_N
Send Feedback
Connected
Device
FMC+ HSPC J22
U39
ICS855S006I
clock buffer
59
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