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set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
VCU118 Board User Guide
UG1224 (v1.0) December 15, 2016
Appendix B: Master Constraints File Listing
POD12_DCI
[get_ports "DDR4_C1_DQ51"];
K21
[get_ports "DDR4_C1_DQ52"];
POD12_DCI
[get_ports "DDR4_C1_DQ52"];
J21
[get_ports "DDR4_C1_DQ53"];
POD12_DCI
[get_ports "DDR4_C1_DQ53"];
K22
[get_ports "DDR4_C1_DQ54"];
POD12_DCI
[get_ports "DDR4_C1_DQ54"];
J22
[get_ports "DDR4_C1_DQ55"];
POD12_DCI
[get_ports "DDR4_C1_DQ55"];
H23
[get_ports "DDR4_C1_DQ56"];
POD12_DCI
[get_ports "DDR4_C1_DQ56"];
H22
[get_ports "DDR4_C1_DQ57"];
POD12_DCI
[get_ports "DDR4_C1_DQ57"];
E23
[get_ports "DDR4_C1_DQ58"];
POD12_DCI
[get_ports "DDR4_C1_DQ58"];
E22
[get_ports "DDR4_C1_DQ59"];
POD12_DCI
[get_ports "DDR4_C1_DQ59"];
F21
[get_ports "DDR4_C1_DQ60"];
POD12_DCI
[get_ports "DDR4_C1_DQ60"];
E21
[get_ports "DDR4_C1_DQ61"];
POD12_DCI
[get_ports "DDR4_C1_DQ61"];
F24
[get_ports "DDR4_C1_DQ62"];
POD12_DCI
[get_ports "DDR4_C1_DQ62"];
F23
[get_ports "DDR4_C1_DQ63"];
POD12_DCI
[get_ports "DDR4_C1_DQ63"];
A24
[get_ports "DDR4_C1_DQ64"];
POD12_DCI
[get_ports "DDR4_C1_DQ64"];
A23
[get_ports "DDR4_C1_DQ65"];
POD12_DCI
[get_ports "DDR4_C1_DQ65"];
C24
[get_ports "DDR4_C1_DQ66"];
POD12_DCI
[get_ports "DDR4_C1_DQ66"];
C23
[get_ports "DDR4_C1_DQ67"];
POD12_DCI
[get_ports "DDR4_C1_DQ67"];
B23
[get_ports "DDR4_C1_DQ68"];
POD12_DCI
[get_ports "DDR4_C1_DQ68"];
B22
[get_ports "DDR4_C1_DQ69"];
POD12_DCI
[get_ports "DDR4_C1_DQ69"];
B21
[get_ports "DDR4_C1_DQ70"];
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