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set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
set_property PACKAGE_PIN
set_property IOSTANDARD
VCU118 Board User Guide
UG1224 (v1.0) December 15, 2016
Appendix B: Master Constraints File Listing
AR33
[get_ports "DDR4_C2_DQ24"];
POD12_DCI
[get_ports "DDR4_C2_DQ24"];
AT34
[get_ports "DDR4_C2_DQ25"];
POD12_DCI
[get_ports "DDR4_C2_DQ25"];
AT29
[get_ports "DDR4_C2_DQ26"];
POD12_DCI
[get_ports "DDR4_C2_DQ26"];
AT30
[get_ports "DDR4_C2_DQ27"];
POD12_DCI
[get_ports "DDR4_C2_DQ27"];
AP30
[get_ports "DDR4_C2_DQ28"];
POD12_DCI
[get_ports "DDR4_C2_DQ28"];
AR30
[get_ports "DDR4_C2_DQ29"];
POD12_DCI
[get_ports "DDR4_C2_DQ29"];
AN30
[get_ports "DDR4_C2_DQ30"];
POD12_DCI
[get_ports "DDR4_C2_DQ30"];
AN31
[get_ports "DDR4_C2_DQ31"];
POD12_DCI
[get_ports "DDR4_C2_DQ31"];
BE34
[get_ports "DDR4_C2_DQ32"];
POD12_DCI
[get_ports "DDR4_C2_DQ32"];
BF34
[get_ports "DDR4_C2_DQ33"];
POD12_DCI
[get_ports "DDR4_C2_DQ33"];
BC35
[get_ports "DDR4_C2_DQ34"];
POD12_DCI
[get_ports "DDR4_C2_DQ34"];
BC36
[get_ports "DDR4_C2_DQ35"];
POD12_DCI
[get_ports "DDR4_C2_DQ35"];
BD36
[get_ports "DDR4_C2_DQ36"];
POD12_DCI
[get_ports "DDR4_C2_DQ36"];
BE37
[get_ports "DDR4_C2_DQ37"];
POD12_DCI
[get_ports "DDR4_C2_DQ37"];
BF36
[get_ports "DDR4_C2_DQ38"];
POD12_DCI
[get_ports "DDR4_C2_DQ38"];
BF37
[get_ports "DDR4_C2_DQ39"];
POD12_DCI
[get_ports "DDR4_C2_DQ39"];
BD37
[get_ports "DDR4_C2_DQ40"];
POD12_DCI
[get_ports "DDR4_C2_DQ40"];
BE38
[get_ports "DDR4_C2_DQ41"];
POD12_DCI
[get_ports "DDR4_C2_DQ41"];
BC39
[get_ports "DDR4_C2_DQ42"];
POD12_DCI
[get_ports "DDR4_C2_DQ42"];
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