Burst Read, 32-Bit Address And Data - LSI LSI53C875A Technical Manual

Pci to ultra scsi controller
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Figure 6.19 Burst Read, 32-Bit Address and Data
CLK
GPIO0_FETCH/
(Driven by LSI53C875A)
GPIO1_MASTER/
(Driven by LSI53C875A)
REQ/
(Driven by LSI53C875A)
GNT/
(Driven by Arbiter)
FRAME/
(Driven by LSI53C875A)
AD
(Driven by LSI53C875A-
Addr; Target-Data)
C_BE/
(Driven by LSI53C875A)
PAR
(Driven by LSI53C875A-
Addr; Target-Data)
IRDY/
(Driven by LSI53C875A)
TRDY/
(Driven by Target)
STOP/
(Driven by Target)
DEVSEL/
(Driven by Target)
6-28
t
2
Electrical Specifications
Data In
Addr
Out
t
3
CMD
BE
Out
t
1
t
2
In
In

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