Block Move And Chained Block Move Instructions - LSI LSI53C875A Technical Manual

Pci to ultra scsi controller
Table of Contents

Advertisement

2.2.17.1 Wide SCSI Send Bit
Figure 2.7

Block Move and Chained Block Move Instructions

Host Memory
0x03
0x02
0x01
0x07
0x06
0x05
0x0B
0x0A
0x09
0x0F
0x0E
0x0D
0x13
0x12
0x11
32 Bits
The WSS bit is set whenever the SCSI controller is sending data
(Data-Out for initiator or Data-In for target) and the controller detects a
partial transfer at the end of a chained Block Move SCRIPTS instruction
(this flag is not set if a normal Block Move instruction is used). Under this
condition, the SCSI controller does not send the low-order byte of the last
partial memory transfer across the SCSI bus. Instead, the low-order byte
is temporarily stored in the lower byte of the
(SODL)
register and the WSS flag is set. The hardware uses the WSS
flag to determine what behavior must occur at the start of the next data
send transfer. When the WSS flag is set at the start of the next transfer,
the first byte (the high-order byte) of the next data send transfer is
"married" with the stored low-order byte in the SODL register; and the
SCSI Functional Description
0x00
0x04
0x06
0x04
0x08
0x0C
0x09
0x10
0x0B
0x0D
SCSI Bus
0x03
0x05
0x07
0x0A
0x0C
16 Bits
SCSI Output Data Latch
2-45

Advertisement

Table of Contents
loading

Table of Contents