Normal/Fast Memory ( 128 Kbytes) Multiple Byte Access Read Cycle - LSI LSI53C875A Technical Manual

Figure 6.27 Normal/Fast Memory ( = 128 Kbytes) Multiple Byte Access Read Cycle
CLK
(Driven by System)
FRAME/
(Driven by Master)
AD
(Driven by LSI53C875A-
Master-Addr; Data)
C_BE[3:0]/
(Driven by Master)
PAR
(Driven by LSI53C875A-
Master-Addr; Data)
IRDY/
(Driven by Master)
TRDY/
(Driven by LSI53C875A)
STOP/
(Driven by LSI53C875A)
DEVSEL/
(Driven by LSI53C875A)
MAD
(Addr Driven by LSI53C875A;
Data driven by Memory)
MAS1/
(Driven by LSI53C875A)
MAS0/
(Driven by LSI53C875A)
MCE/
(Driven by LSI53C875A)
MOE/
(Driven by LSI53C875A)
MWE/
(Driven by LSI53C875A)
6-44
0 2 4
Addr In
CMD
In
Address
Electrical Specifications
6 8
Byte Enable
Upper Middle Lower
Address Address
10 12 14 16 17