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5.8.2 Second Dword
31
DMA SCRIPTS Pointer Save (DSPS)
x
x
x
x
x
x
x
Note:
This bit has no effect unless the Prefetch Enable bit in the
DMA Control (DCNTL)
LS
Load and Store
When this bit is set, the instruction is a Load. When
cleared, it is a Store.
R
Reserved
RA[6:0]
Register Address
A[6:0] selects the register to Load and Store to/from
within the LSI53C875A.
R
Reserved
BC
Byte Count
This value is the number of bytes to Load and Store.
x
x
x
x
x
x
x
Memory I/O Address / DSA Offset
This is the actual memory location of where to Load and
Store, or the offset from the
(DSA)
Load and Store Instructions
register is set.
Register - Memory I/O Address/DSA Offset
x
x
x
x
x
x
x
register value.
x
x
x
x
x
x
x
Data Structure Address
24
23
[22:16]
[15:3]
[2:0]
0
x
x
x
x
[31:0]
5-37
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