Normal/Fast Memory ( 128 Kbytes) Multiple Byte Access Write Cycle - LSI LSI53C875A Technical Manual

Figure 6.28 Normal/Fast Memory ( = 128 Kbytes) Multiple Byte Access Write Cycle
CLK
(Driven by System)
FRAME/
(Driven by Master)
AD
(Driven by Master-Addr;
LSI53C875A-Data)
C_BE[3:0]/
(Driven by Master)
PAR
(Driven by Master-Addr;
LSI53C875A-Data)
IRDY/
(Driven by Master)
TRDY/
(Driven by LSI53C875A)
STOP/
(Driven by LSI53C875A)
DEVSEL/
(Driven by LSI53C875A)
MAD
(Driven by LSI53C875A)
MAS1/
(Driven by LSI53C875A)
MAS0/
(Driven by LSI53C875A)
MCE/
(Driven by LSI53C875A)
MOE/
(Driven by LSI53C875A)
MWE/
(Driven by LSI53C875A)
6-46
0 2
Addr In
CMD
In
Electrical Specifications
4 6 8
Data In
Byte Enable
Upper Middle
Address Address
10 12
Lower
Address
14