Back-To-Back Write, 32-Bit Address And Data - LSI LSI53C875A Technical Manual

Figure 6.18 Back-to-Back Write, 32-Bit Address and Data
CLK
(Driven by System)
GPIO0_FETCH/
(Driven by LSI53C875A)
GPIO1_MASTER/
(Driven by LSI53C875A)
REQ/
(Driven by LSI53C875A)
GNT/
(Driven by Arbiter)
FRAME/
(Driven by LSI53C875A)
AD
(Driven by LSI53C875A-
Addr; Target-Data)
C_BE/
(Driven by LSI53C875A)
PAR
(Driven by LSI53C875A-
Addr; Target-Data)
IRDY/
(Driven by LSI53C875A)
TRDY/
(Driven by Target)
STOP/
(Driven by Target)
DEVSEL/
(Driven by Target)
6-26
t
9
t
6
t
4
t
5
t
3
t
3
Addr
Out
t
3
CMD BE
t
1
Electrical Specifications
t
10
Data
Out
t
3
t
3
t
2
t
1
t
3
Addr Data
Out Out
t
3
CMD BE
t
3
t
2