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LSI53C875A
Technical manual
Scsi Register Address Map - LSI LSI53C875A Technical Manual
Pci to ultra scsi controller
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Table 4.2
SCSI Register Address Map
31
SCNTL3
GPREG0
SBCL
SSTAT2
MBOX1
CTEST3
CTEST6
DCMD
DCNTL
SIST1
GPCNTL0
RESPID1
STEST3
Reserved
CCNTL1
Reserved
Reserved
16 15
SCNTL2
SDID
SSID
SSTAT1
MBOX0
CTEST2
TEMP
CTEST5
DNAD
DSPS
SCRATCH A
SBR
ADDER
SIST0
MACNTL
RESPID0
STEST2
STEST4
CCNTL0
Reserved
SCRATCH B
SCRATCH C–SCRATCH R
MMRS
MMWS
SFS
DRS
SBMS
DBMS
DNAD64
Reserved
PMJAD1
PMJAD2
RBC
ESA
CSBC
Reserved
SCSI Registers
SCNTL1
SXFER
SOCL
SSTAT0
DSA
ISTAT1
CTEST1
CTEST4
DBC
DSP
DIEN
SIEN1
SWIDE
STIME1
STEST1
UA
IA
SBC
SCNTL0
SCID
SFBR
DSTAT
ISTAT0
CTEST0
DFIFO
DMODE
SIEN0
SLPAR
STIME0
STEST0
SIDL
SODL
SBDL
0
0x00
0x04
0x08
0x0C
0x10
0x14
0x18
0x1C
0x20
0x24
0x28
0x2C
0x30
0x34
0x38
0x3C
0x40
0x44
0x48
0x4C
0x50
0x54
0x58
0x5C
0x60–0x9F
0xA0
0xA4
0xA8
0xAC
0xB0
0xB4
0xB8
0xBC
0xC0
0xC4
0xC8
0xCC
0xD0
0xD4
0xD8
0xDC
0xE0–0xFF
4-19
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Bidirectional Signals—Mad[7:0], Mas/[1:0], Mce/, Moe Mwe/
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